Field of the Invention
The invention relates to a method for fabricating a field-effect transistor having a floating gate. Transistors of the generic type contain a control gate above an insulating layer on the surface of a semiconductor substrate in a region of defined geometry that extends from the source to the drain. The floating gate extends in a partial region below the control gate and is insulated all around. In such field-effect transistors, electrical charge can be stored over a very long time of the order of magnitude of years; their preferred field of use, therefore, is programmable and reprogrammable semiconductor read-only memories.
In the case of a conventional fabrication method for field-effect transistors having a floating gate, first a first layer sequence is constructed on a part of the substrate surface, which layer sequence has, at the very bottom, a thin dielectric layer as a tunnel dielectric for the floating gate (preferably an oxide layer as so-called “tunnel oxide”), above that a layer made of the material of the floating gate and, at the very top, a layer with a good dielectric property in order to form the dielectric for the so-called coupling capacitance between the control gate and the floating gate. The last-mentioned layer, which shall hereinafter be referred to as a “coupling dielectric” for short, preferably contains a nitride layer between two thin oxide layers. The combined oxide-nitride-oxide layer, usually referred to as “ONO” layer, is extremely thin in order to obtain a high coupling capacitance. The entire first layer construction is patterned by photolithographic etching technology in such a way as to produce sidewalls that define parts of the final contour of the floating gate. Afterward, at least that remaining part of the substrate surface over which the control gate is intended to extend, and the above-mentioned sidewalls of the first layer construction are oxidized in order to produce the control gate insulating layer (“high-voltage gate oxide”) on the part of the substrate surface and to form the edge insulation of the floating gate at the sidewalls. The material of the control gate is applied thereon, and, after the patterning of the entire layer construction thus formed to the desired contour of the control gate, a post-oxidation of the surfaces including the sidewalls of the layer construction takes place. The selective doping of the substrate in order to form the source and drain zones is effected partly before and partly after the post-oxidation.
It has been observed that, in the course of this method, the material of the floating gate below the edge regions of the coupling dielectric is oxidized to give a form that recalls the shape of a bird's beak. The bird's beaks, made of an oxide that has formed, increase a distance between the remaining material of the floating gate and the control gate and additionally bend the edges of the coupling dielectric upward. They arise to a particularly pronounced extent where the sidewalls of the floating gate are oxidized before the application of the control gate material. The coupling dielectric is thickened at these points, since the distance between the underside of the subsequently applied control gate material and the material of the floating gate is additionally increased as a result of this. However, similar bird's beaks also arise during the later post-oxidation, to be precise where the coupling dielectric and the floating gate reach the outer sidewall after the patterning of the overall layer construction. Owing to the comparatively smaller thickness of the post-oxidation, the bird's beak formation is less pronounced, however, at this point.
The above-described bird's beak effect reduces the coupling capacitance between the control gate and the floating gate in an undesirable manner. In order to compensate for this disadvantage, hitherto the horizontal extent of the floating gate and of the overlying coupling dielectric has been enlarged and the “cell area” has thus been made larger than would actually be desirable.